Digital VLSI SoC

Design and Planning

(Duration - 2 Weeks)

Welcome to the fascinating universe of Physical Design or PnR (Place and Route), where the pulse of every IC design cycle beats. Imagine transforming a bare RTL netlist into a masterpiece of engineering, the final tape-out. Each stage in the PnR process is a new chapter filled with unique challenges and revelations.
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Welcome to the fascinating universe of Physical Design or PnR (Place and Route), where the pulse of every IC design cycle beats. Imagine transforming a bare RTL netlist into a masterpiece of engineering, the final tape-out. Each stage in the PnR process is a new chapter filled with unique challenges and revelations.

Do you find yourself asking, “What are these obstacles?” “How does this intricate process work?” “Could I actually create my own chip?” If these questions ignite your curiosity and you’re passionate about delving into the ASIC design flow, your adventure starts here!

We’re excited to introduce a game-changer: the Google-Sky Water collaboration has unveiled the first open source, manufacturable 130nm process design kit (pdk). This innovation transcends the boundaries of academic research and small-scale projects, propelling the open-source EDA world into a new dimension.

Coupled with the inception of Openlane flow, a fully automated RTL2GDSII process, we’re closer than ever to realizing the dream of “an IC for everyone.” Get ready for the ultimate workshop on SoC design planning using the revolutionary Google-SkyWater 130nm process node within the OpenLANE flow.

This workshop is your gateway to:

Seize this unparalleled opportunity to transform your passion into expertise!


5 compelling reasons to join this workshop


Join us for this transformative journey and turn your fascination into tangible skills in the ever-evolving world of IC design!


Here’s a sneak peek at the powerful open-source tools you’ll be mastering, each a key player in the transformative journey of IC design:

Lab Exercises


VSD Participants Profile

Delivery Mode

We’ve tailored every aspect of the workshop to ensure an effective and enjoyable learning journey:


Fresher or recently graduated or experienced professionals looking to brush fundamentals.

Atleast BE/BTech/ME/MTech or equivalent.

About VSD


Online Beginner Course




VSD Community Based Silicon Tape Out


Analog & Mixed Signal IPs


VSDOpen Online Conference


Unique Global students


VSD Hackathon Participants


VSDSquadron Educational and Dev Kit

VSD, standing as a trailblazing Semiconductor EdTech company and a community-based Technology Aggregator, is revolutionizing the landscape of VLSI Design. With the belief that “Creativity is just connecting things”, VSD has mastered the art of linking the right resources with the community. This unique approach has sparked a significant transformation in the VLSI Design process.

Over the past decade, VSD has made remarkable strides in the open-source semiconductor domain. Our journey includes the development of comprehensive training content, empowering students to design silicon-grade IP/SoC. Notably, we’ve successfully guided these projects through the tapeout cycle via the Google open shuttle program. This achievement is a testament to our commitment to hands-on, practical education.

At VSD, our role extends beyond traditional education. While we didn’t invent EDA tools or design flows, we’ve made them accessible to a wider community. Our mentorship has been instrumental in the development of over 50+ Analog/Digital IPs and solutions. Impressively, 20+ of these have successfully transitioned from concept to Silicon – a clear indicator of our effective approach and the high quality of work produced under our guidance.

We pride ourselves on fostering a community-based revolution in the Semiconductor Industry. By democratizing access to advanced tools and knowledge, VSD is not just educating individuals; we are building a community of innovators poised to lead the next wave of advancements in the semiconductor sector. With VSD, the future of VLSI Design is not just being written; it’s being rewritten by a passionate and empowered community.

Instructor Profile

Meet Your Guides to the World of VLSI Design


What's the cost to register?

We've set a special discounted fee of INR 999 (INR7000). Our aim is to make Open-source EDA tools and PDKs accessible for various purposes such as college projects, PhD research, semester lectures, and keeping up with industry trends.

Can I participate according to my schedule?

Absolutely! The workshop is hosted on the VSD-IAT cloud platform, offering flexibility to log in at your convenience. The platform is accessible 24 hours a day during the two weeks duration of the workshop.

I'm a second-year engineering student. Is this workshop suitable for me?

Definitely! We welcome learners of all ages and backgrounds. Our previous RISC-V workshop included students as young as those in 8th grade. This workshop, while advanced in title, starts with the basics to ensure a solid foundational understanding.

Can experienced system designers join to refresh their knowledge?

This workshop is primarily designed for newcomers to the field of VLSI. However, experienced professionals interested in sharing their expertise with students are more than welcome to join.

Will I have access to the workshop content after it ends?

Yes, you will receive lifetime access to all lab files. However, access to the videos and the VSD-IAT platform will end with the workshop.

Do I need to install any software for the labs?

No, all labs will be conducted on the VSD-IAT cloud platform using a Linux Terminal with all necessary tools pre-installed. Post-workshop, we will provide scripts for you to install these tools on your own computer for further practice and revision.

How are the labs distributed for this workshop?

Labs will be shared via a virtual box image. You'll receive detailed instructions on accessing and using this image a day before the workshop starts.

What platform is used for the lectures?

Lectures will be delivered through the VSD-IAT LMS platform. This platform allows you to access course materials and interact with the content at your own pace.

Is there support available during the workshop?

Yes, our instructors and Teaching Assistants are available 24/7 on Slack throughout the 14-day workshop to answer questions, provide clarifications, and help.

Is there a specific time for addressing urgent issues?

Indeed, there's a daily one-hour sync-up call during the workshop. This is a valuable time for discussing any immediate issues, challenges, and for receiving direct guidance from instructors and TAs.

Is the workshop flexible for asynchronous participation?

Yes, the workshop is hosted on a cloud-based platform, allowing you to access materials and complete tasks at your convenience, ensuring flexibility in your learning schedule.

Media Coverage

Innovation & Education Unite

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Unleashing VLSI

Job Roles, Convergence With Embedded Systems, and Startups

Semicon India 2023

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Puthiya Thalaimurai

VSDSquadron Educational board on Tamil News channel

NIT Jamshedpur

5 day workshop on VLSI Design flow using RISCV and EDA tools

Sahyadri College

Karnataka VLSI roadshow at Sahyadri College, Mangalore


Registration Fee

Digital VLSI SoC
999 (₹ 7,000)
  • 10 July - 15 Oct 2024

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